SDC学习笔记 —— （1）复杂时钟树约束

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对于复杂时钟树的约束，整体思路，见到clock mux需要加create_generated_clock用来创建clock，在clock mux的input和output都得加，并且需要定义其group信息，以便后续综合和PR工具更好优化处理

电路图示例

1 create端口时钟

create_clock  -name RCO    -period 20        -waveform  { 0 10 }       [ get_ports RCO ]
create_clock  -name HXT    -period 20        -waveform  { 0 10 }       [ get_ports HXT ]
create_clock  -name PLL    -period 6.25      -waveform  { 0 3  }       [ get_ports  PLL ]
create_clock  -name SLEEP  -period 31250     -waveform  { 0 15625 }    [ get_ports SLEEP ]
create_clock  -name LEX    -period 30517.58  -waveform  { 0 15258 }    [ get_ports LXT ]

set_clock_uncertainty  -setup/-hold [ period 10% ]  [ get_clocks RCO ]
set_clock_uncertainty  -setup/-hold [ period 10% ]  [ get_clocks HXT ]
set_clock_uncertainty  -setup/-hold [ period 10% ]  [ get_clocks PLL ]
set_clock_uncertainty  -setup/-hold [ period 10% ]  [ get_clocks SLEEP ]
set_clock_uncertainty  -setup/-hold [ period 10% ]  [ get_clocks LXT ]

2 create generated clock

创建clock mux m0上的clock为示例

# 声明MUX m0的input clocks
create_generated_clock  -name  m0_I0   -master_clock  RCO -source [ get_ports RCO ] \
                        -add -divide 1    [ get_pins  m0/I0 ]
create_generated_clock  -name  m0_I1   -master_clock  HXT -source [ get_ports HXT ] \
                        -add -divide 1    [ get_pins  m0/I1 ]
set_clock_groups  -logically_exclusive  -group { m0_I0 }  -group { m0_I1 }

# 声明MUX m0的output clocks
create_generated_clock  -name  m0_Y0   -master_clock  m0_I0 -source [ get_pins m0/I0 ] \
                        -add -divide 1    [ get_pins  m0/Y ]
create_generated_clock  -name  m0_Y1   -master_clock  m0_I1 -source [ get_pins m0/I1 ] \
                        -add -divide 1    [ get_pins  m0/Y ]
set_clock_groups  -physically_exclusive  -group { m0_Y0 }   -group { m0_Y1 }

3 set_case_analysis定义某个节点上的generated clock

如命令含义所示，就是按照case语句去分情况定义同一个clock。对上上图中的电路，整理思路如下：

假设clk_sel = {m3/s, m2/s, m1/s, m0/s}

clk_sel = 00x0: create_generated_clock -name clk_buf -master_clock m3_Y0_0_0

clk_sel = 00x1: create_generated_clock -name clk_buf -master_clock m3_Y0_0_1

clk_sel = 01xx: create_generated_clock -name clk_buf -master_clock m3_Y0_0

clk_sel = 1x0x: create_generated_clock -name clk_buf -master_clock m3_Y1_0

clk_sel = 1x1x: create_generated_clock -name clk_buf -master_clock m3_Y1_1

set_case_analysis 0 [ get_pins m3/s ]
set_case_analysis 0 [ get_pins m2/s ]
set_case_analysis 0 [ get_pins m0/s ]
create_generated_clock  -name  clk_buf   -master_clock  m3_Y0_0_0 -source [ get_pins  m3/Y ] \
                        -add -divide 1    [ get_pins  clk_buf/Y ]
set_case_analysis 0 [ get_pins m3/s ]
set_case_analysis 0 [ get_pins m2/s ]
set_case_analysis 1 [ get_pins m0/s ]
create_generated_clock  -name  clk_buf   -master_clock  m3_Y0_0_1 -source [ get_pins  m3/Y ] \
                        -add -divide 1    [ get_pins  clk_buf/Y ]
set_case_analysis 0 [ get_pins m3/s ]
set_case_analysis 1 [ get_pins m2/s ]
create_generated_clock  -name  clk_buf   -master_clock  m3_Y0_0 -source [ get_pins  m3/Y ] \
                        -add -divide 1    [ get_pins  clk_buf/Y ]
set_case_analysis 1 [ get_pins m3/s ]
set_case_analysis 0 [ get_pins m1/s ]
create_generated_clock  -name  clk_buf   -master_clock  m3_Y1_0 -source [ get_pins  m3/Y ] \
                        -add -divide 1    [ get_pins  clk_buf/Y ]
set_case_analysis 1 [ get_pins m3/s ]
set_case_analysis 1 [ get_pins m1/s ]
create_generated_clock  -name  clk_buf   -master_clock  m3_Y1_1 -source [ get_pins  m3/Y ] \
                        -add -divide 1    [ get_pins  clk_buf/Y ]

声明：属个人学习笔记，里面可能包含诸多错误之处，如果恰好被英俊潇洒倾国倾城的你发现了，麻烦指正，祝您牛逼！多谢！