Regenerated Wafers Continue to See Production Increases in Taiwan
Organizing the processes and industrial structure from the perspectives of Scientech and PSI
When following semiconductor news in Taiwan, one often sees reports on the expansion of regenerated wafer production by Scientech Corporation and Powertec Semiconductor Inc. (PSI, hereafter "PSI").
The term "regenerated wafer" itself is easy to understand. Used wafers are cleaned and used again. However, when looking into the details, it is easier to view this as a process service industry that supports semiconductor fab process management, rather than just "recycling used wafers."
What is being regenerated? How much can be ground down before it can be reused? Why are wafers with Cu difficult to handle? And why does the expansion of regeneration capacity continue so strongly in Taiwan? This article will organize the processes and industrial structure of regenerated wafers, starting with major Taiwanese companies.
What is regenerated are mainly wafers used for process management
Not all wafers processed in a semiconductor fab become products. In mass production lines, test wafers are used separately from product wafers for checking equipment status, adjusting process conditions, measuring film thickness and etching amounts, and monitoring particles. There are also those called monitor wafers or dummy wafers, and their names and uses overlap somewhat depending on the manufacturer and process.
SEMI's regenerated silicon wafer standard M38 also classifies regenerated wafers into four uses: Mechanical, Furnace, Particle, and Lithography. In other words, there is no single quality standard for "regenerated wafers"; the required quality differs depending on what they will be used for next. Even in the standards, many items are specified by the customer.
And the amount of test wafers used is surprisingly high. According to Scientech, in typical CMOS logic/memory manufacturing, about 10 to 20% of the wafers processed in one batch are test wafers. The actual ratio varies depending on the complexity of the process and the quality management method.
RS Technologies estimates in another document that about 20% of wafers introduced into semiconductor manufacturing lines are test wafers, and about 80% of those use regenerated wafers. While this is a market perception by RS itself and not a confirmed industry-wide value, it shows that regenerated wafers are circulating in quite large quantities.
The reason the regenerated wafer market is larger than imagined lies first in the size of this base number.
Received from the fab, regenerated, and returned
The typical flow is a cycle of: used in the fab -> sent to a regeneration company -> regeneration processing -> used in the fab again.
However, it is not necessarily the case that the exact wafer with the same serial number provided by the customer is returned. Also, SEMI M38 assumes not only wafers supplied by the customer but also forms where wafers procured from third parties are regenerated and supplied.
In that sense, regenerated wafer companies are slightly different from mere used wafer sales companies. They restore the surface condition to meet customer specifications and supply them continuously. As we look at this by region later, the nature of this region-specific process service becomes quite significant.
In the regeneration process, it is important "not to grind the Si too much"
The regeneration process varies depending on the wafer condition and manufacturer, but generally follows the flow of: receiving/sorting -> film removal -> grinding/polishing -> cleaning -> inspection.
First, the history and condition are classified, such as whether there is a pattern, a metal film, or if the wafer has gone through a Cu-based process. Scientech also separates Cu/Non-Cu processes for 12-inch Si regeneration and manages particles, trace metals, and flatness.
What is important here is that you must not grind the Si too much just to clean it. If you grind the surface significantly, it is easy to remove contamination and damage. However, the wafer becomes thinner each time. RS Technologies also cites as a strength its technology to suppress the amount of Si removed in order to increase the number of regeneration cycles.
In other words, what regeneration companies are competing on is not simple "cleaning power." They remove the necessary contamination and damage. However, they leave as much Si as possible. This balance is one of the core aspects.

It is not enough just to have thickness remaining
Whether a wafer can be reused is not determined solely by its remaining thickness.
TTV is an indicator for thickness variation within a wafer, Bow for the overall bow-like warpage of the wafer, and Warp for three-dimensional warpage or waviness in a broader sense. Furthermore, surface conditions, scratches, chips, particles, and metal contamination are also checked.
The feasibility of reuse is determined not by how many micrometers are left, but by whether it can meet the shape and surface quality requirements for the next application. Therefore, there is no uniform answer to 'how many times can a reclaimed wafer be used?' It varies depending on the application, the original wafer state, the amount removed each time, and customer specifications.
Patterns and Cu present different types of difficulties
In the case of wafers without patterns, there are instances where a relatively uniform film is simply attached to the entire surface. On the other hand, patterned wafers that have undergone lithography, etching, etc., retain steps and irregularities on the surface. To return these to flat wafers again, those irregularities must be removed. As a result, the amount of removal tends to increase, and the control of polishing conditions becomes more difficult.
In other words, the problem with patterns lies mainly in 'how to return the shape to a flat state.'
On the other hand, Cu has a different kind of difficulty. The Cu wafers referred to here are not wafers made of copper, but refer to a state where silicon wafers have passed through processes using Cu wiring, etc., and have Cu films or Cu contamination.
A particular problem in the reclamation process is cross-contamination. If Cu is brought into a Non-Cu process from chemical solutions, polishing systems, or transport systems that have handled Cu, the reclamation process itself can become a new source of contamination. The reason Scientech separates Cu/Non-Cu processes is because this management is necessary.
To summarize, it is easy to understand if you think of patterns as the difficulty of shape and planarization, and Cu as the difficulty of contamination removal and isolation. With Cu + patterns, these two challenges overlap.

There is also a method of removing Cu after moving it with heat
What was interesting while researching Cu reclamation was a patent held by Sunnytek.
Taiwan Patent TWI766599B held by Sunnytek describes a method in which a film-removed wafer is heat-treated (annealed) at 150 to 500°C to promote the movement of Cu atoms inside the Si and precipitate them to the surface side, followed by polishing and cleaning to reduce the Cu concentration.
If the contamination is on the surface, it can be removed by cleaning. However, if Cu has penetrated into the Si, that alone is not enough to remove it. Therefore, the idea is to apply heat to move the Cu, bring it to the surface side, and then remove it.
However, the process described in the patent is not necessarily the same as the current mass production standard process. In Sunnytek's Q2 2026 corporate briefing materials, the current reclamation technology is explained in a different process roadmap, and annealing is not shown as a standard process. Therefore, it cannot be confirmed from public information to what extent this patented technology is currently used in mass production.
What are they competing for with 15nm and 19nm?
Numbers such as 15nm and 19nm also appear in the materials of various reclaimed wafer companies.
Sunnytek lists the number and size of particles, metal contamination, return yield, and surface removal amount as quality indicators for reclaimed wafers, and in its Q2 2026 materials, it indicates a policy to further advance its roadmap for micro-defect management. As of May 2026, Scientech also announced 19nm-class particle management, trace metal levels of less than 1×10⁹ atoms/cm², and inspections using KLA SP1/SP2/SP5/SP7.
However, it cannot be simply said that '15nm is higher quality than 19nm.' In actual acceptance conditions, multiple conditions are combined, such as how many defects of a certain size or larger are allowed, how much metal contamination is allowed, and what the shape and surface conditions are. Even in SEMI M38, many items are customer-specified.
Therefore, it is better to view the numbers 15nm and 19nm as representative values indicating the technical level of managing micro-defects of that size class as a mass production process, rather than the specifications of the inspection equipment itself. Note that no public documents have been found that can confirm that these are the specific internal standards of TSMC.
Demand for reclaimed wafers tends to increase as nodes become more advanced
The reason for the growing demand for reclaimed wafers is not just the increase in semiconductor production volume.
As nodes become more advanced, the number of process steps increases, and the allowable variation decreases. Process control for film deposition, etching, CMP, and cleaning also becomes more stringent.
Sunny Synergistics also provides estimates showing that the usage density of reclaimed wafers increases with more advanced nodes. In their Q2 2026 investor presentation materials, they set 10nm as 1, with 1.5 for 7nm, 2 for 5nm, 2.5 for 3nm, 3.15 for 2nm, and 4 for 1.4nm. The source is estimates from UBS and Sunny Synergistics, not industry-standard measured values.
In the first place, a certain amount of test wafers themselves is required. If the increase in usage density in advanced processes is added to that, there is a possibility that the demand for reclaimed wafers will grow at a faster pace than the production volume of product wafers.
Major players in Taiwan have quite different origins
Looking at the Taiwanese market, even though they handle the same reclaimed wafers, the origins of each company are quite different.
Sunny Synergistics has scaled up with reclaimed wafers as its core business. According to their Q2 2026 investor presentation materials, the company's total wafer shipment volume in 2025 was 9.486 million units in 12-inch equivalents. This is not for reclaimed wafers alone, but the total company wafer shipment volume disclosed by the company. Regarding production capacity, the Central News Agency reported on a production increase plan announced by Sunny Synergistics in August 2025, stating that they plan to expand reclaimed wafer capacity from 850,000 units per month in 2025 to a scale of 1.2 million units per month by the end of 2026.
KINIK (hereinafter "KINIK") was originally a company specializing in grinding wheels and grinding technology. For reclaimed wafers, it features the use of ductile mode grinding to suppress subsurface damage and chemical contamination. In their official Q1 2026 investor presentation materials, they clearly state a plan to increase 12-inch capacity to 360,000 units per month in Q2 and to 400,000 units per month from Q3.
Scientech is different again. It is a company that combines equipment agency, self-manufactured equipment, and reclaimed wafers. In their official May 2026 investor presentation materials, they set their 12-inch Si reclamation capacity at 210,000 units per month and indicated a plan to add 40,000 units per month in Q4 2026 and another 50,000 units per month in 2027.
RS Technologies is a Japanese company, but it also has a reclamation base in Tainan, Taiwan, with a capacity of 300,000 12-inch units per month. The Sanbongi plant in Japan has a capacity of 340,000 units per month, and in 2025, the shipment destinations for 12-inch reclaimed wafers were 55.0% to Japan and 35.1% to Taiwan.
To summarize, differences emerge: Sunny Synergistics focuses on scale and automation, KINIK on grinding and grinding wheel technology, Scientech on a composite development with the equipment business, and RS on multi-regional expansion of reclamation technology.
Japan is larger than expected
Looking by region, what was a bit surprising was the size of Japan.
In the 2024 survey by QY Research, the global reclaimed silicon wafer market in 2023 was estimated at 629 million dollars, with Taiwan at approximately 46%, Japan at approximately 33%, and the United States at approximately 7%. It is calculated that Taiwan and Japan alone account for about 80%. This is an estimate based on sales by a market research firm, and I would like to treat it as a reference value for looking at the regional structure rather than as an absolute value.
Because Taiwan has a huge 12-inch advanced logic industry centered on TSMC, it is easy to get the impression that Taiwan far exceeds Japan in reclaimed wafers as well. However, looking at the world's major reclaimed wafer companies, there are players in Japan such as RS Technologies, Mitsui Mining & Smelting, Hamada Rectech, and Shinryo. Reclaimed wafer demand arises not only from advanced logic but also from memory and other semiconductor manufacturing.
At least as far as the QY Research estimates go, the structure is not such that the Taiwanese market is many times larger than Japan's.
On the other hand, this country-by-country share cannot be read directly as the "actual number of wafers being reused." This is because in South Korea and the United States, there are cases where wafers are reclaimed within the Fab without using external reclamation companies.
South Korea, China, and the United States have different structures
In South Korea, SK hynix is working on initiatives to reclaim wafers within the Fab. On the other hand, since external reclamation companies also exist, it is better to think of it as a market where both outsourcing and in-house reclamation exist.
In the United States as well, a paper published in the IEEE titled "In-House Test Wafer Reclaim for Fab Cost and Wastage Reduction" reports cases where test wafers that were previously sent to external contractors are being reclaimed within the Fab.
China is different. Hwatsing already possessed a specialized reclamation line with a capacity of 200,000 wafers per month as of 2026, and is further advancing the expansion of its reclamation capacity as a fundraising project. Ferrotec also held a groundbreaking ceremony for a new reclaimed wafer factory in Hefei, Anhui Province, on April 23, 2026. The factory, which spans approximately 80,000 square meters, is scheduled to begin operations in December 2027.
Rather than saying that the demand for reclamation itself is small in China, it seems more accurate to view the current movement as a stage where external reclamation capacity is being rapidly developed locally to meet the massive demand from 12-inch fabs.
Looking at it this way, we can see differences: Taiwan has large-scale external reclamation companies, Japan has a mature external reclamation industry, South Korea has a coexistence of outsourcing and in-fab reclamation, China is rapidly increasing its external reclamation capacity, and the United States has a coexistence of external and in-fab reclamation.
The map of the reclaimed wafer industry is not simply a scaled-down version of the semiconductor production capacity map. How much is processed within the fab, and at what point is it sent externally? Are high-quality reclamation companies present near the customers? These differences seem to determine the market structure for each region.

Reclamation is also possible for SiC
The targets for reclamation are not limited to Si. Scientech has announced that its reclamation business will handle not only Si but also SiC.
Because SiC is harder than Si and chemically stable, the difficulty of grinding and polishing itself is high. On the other hand, since the unit price of the substrate is high, the economic significance of being able to reuse wafers for process control purposes can be substantial.
In Taiwan, another company, Global Compound Semiconductors (GCCS), is also a noteworthy presence. GCCS is a Taiwanese company that handles SiC crystal and wafer technology, and it also lists "Reclaimed Wafers" among its official product groups. On that page, it explains reclamation services for Test Wafers and Monitor/Dummy Wafers.
However, I would like to make a distinction here. While the company GCCS itself focuses on SiC, the reclaimed wafer page does not explicitly state that the material targeted for reclamation is SiC. Therefore, at this point, it cannot be said that "GCCS is mass-producing SiC reclaimed wafers." Furthermore, the 210,000-wafer-per-month capacity announced by Scientech is a figure for 12-inch Si and does not indicate SiC processing capacity.
Currently, Si is the overwhelming protagonist, but as expensive SiC substrates become more widespread, the extent to which SiC wafers for process control can be reused will likely become a theme for the future.
What reclaimed wafer companies are selling is not "clean used wafers"
Upon organizing this, it became clear that what reclaimed wafer companies are providing is not simply used wafers with clean surfaces.
Classifying the history of the wafer. Changing the removal method according to the film and pattern. Isolating Cu from other processes. Restoring flatness without over-grinding the Si. Inspecting for minute particles and metal contamination. And repeating this stably for a large number of wafers. The entirety of this is the reclaimed wafer business.
Considering Scientech's explanation that test wafers account for about 10-20% of processed wafers in a typical CMOS process, the quantity itself is not small. If process control becomes stricter as nodes become more advanced, it seems closer to reality to think of reclaimed wafers not as "cheap used wafers," but as infrastructure for circulating the silicon wafers used in large quantities for process control for as long as possible.
When looking at news about Scientech and PSI in Taiwan, from now on, it is worth paying attention not only to simple production capacity, but also to what quality class can be reclaimed, how much Si can be preserved, how much customers will outsource reclamation, how much reclamation capacity will be localized around new overseas fabs, and how far it will expand to new materials such as SiC.
Main References
Scientech May 2026 Investor Presentation Materials: Reclamation capacity, Cu/Non-Cu, 19nm-class management, capacity expansion plans, etc. PSI (Prosperity Semiconductor) Q2 2026 Investor Presentation Materials: 2025 company-wide wafer shipment volume, reclamation technology/quality roadmap, estimated reclaimed wafer usage density by advanced node, etc. KINIK Q1 2026 Investor Presentation Materials: 12-inch capacity expansion, ductile mode grinding, etc. RS Technologies Annual Report 2025: Estimated usage of test wafers/reclaimed wafers, capacity in Japan and Taiwan, etc. SEMI M38: Classification of reclaimed wafer applications, customer-specified specifications, customer-supplied/third-party procurement. QY Research "Global Reclaim Silicon Wafer Market Research Report 2024": 2023 market size and regional estimates. Central News Agency (CNA): Reports on PSI's reclaimed wafer capacity expansion plan. Hwatsing, Ferrotec official materials: Reclamation capacity expansion in China. Global Compound Semiconductors (GCCS) official website: SiC business and reclaimed wafers. Taiwan Patent TWI766599B (Prosperity Semiconductor): Reclamation process for Cu reduction using annealing.
