IO programming in user space.
Note, you are doing in user space, with uclibc and included from /opt/nios2/include. It is not kernel space. You can not use interrupt. You can not use nios2 HAL, either.
You should know about the cache in Nios II. (BadOman:?) The first 2GB of address space is cached. The second 2GB is non-cached. These are not two seperate memory spaces or anything so there is a total of 2GB of address space (mirrored memory). This only applies for Nios II Full version with Data Cache. Nios II Standard version is uncached, so there should be no problems.
In other words address 0x00000000 (cachable) maps to address 0x8000000 (non-cachable)
" " " " " " 0x00000001 " " " " " " " " 0x8000001 (and so on .....)
So use the first 2GB for non-peripheral access (local memory), and the second 2GB for peripherals
You can define memory pointer access, and you can make it uncached by setting address bit 31.
eg, 0x00004000 -> 0x80004000
Or use port address defined in nios2_system.h, eg na_button_pio.
#include
#define inw(port) (*(volatile unsigned *)(port)) # for io read,
#define outw(d,port) (*(volatile unsigned *)(port))=(d) # for io write,
As an alternative, you can use these two defines (which are always uncached), they are similar to the Nios2-IDE functions :
#define IORD(address,offset) (*(volatile unsigned *)(((address)|0x80000000)+4*(offset)))
#define IOWR(address,offset,value) (*(volatile unsigned *)(((address)|0x80000000)+4*(offset)))=(value)
本文转自
file:///E:/g/linuxnios/pages/CompileHello%20-%20JotSpot%20Wiki%20(nioswiki).htm
Note, you are doing in user space, with uclibc and included from /opt/nios2/include. It is not kernel space. You can not use interrupt. You can not use nios2 HAL, either.
You should know about the cache in Nios II. (BadOman:?) The first 2GB of address space is cached. The second 2GB is non-cached. These are not two seperate memory spaces or anything so there is a total of 2GB of address space (mirrored memory). This only applies for Nios II Full version with Data Cache. Nios II Standard version is uncached, so there should be no problems.
In other words address 0x00000000 (cachable) maps to address 0x8000000 (non-cachable)
" " " " " " 0x00000001 " " " " " " " " 0x8000001 (and so on .....)
So use the first 2GB for non-peripheral access (local memory), and the second 2GB for peripherals
You can define memory pointer access, and you can make it uncached by setting address bit 31.
eg, 0x00004000 -> 0x80004000
Or use port address defined in nios2_system.h, eg na_button_pio.
#include
#define inw(port) (*(volatile unsigned *)(port)) # for io read,
#define outw(d,port) (*(volatile unsigned *)(port))=(d) # for io write,
As an alternative, you can use these two defines (which are always uncached), they are similar to the Nios2-IDE functions :
#define IORD(address,offset) (*(volatile unsigned *)(((address)|0x80000000)+4*(offset)))
#define IOWR(address,offset,value) (*(volatile unsigned *)(((address)|0x80000000)+4*(offset)))=(value)
本文转自
file:///E:/g/linuxnios/pages/CompileHello%20-%20JotSpot%20Wiki%20(nioswiki).htm
本文介绍在 Nios II 处理器的用户空间进行 IO 编程的方法,包括如何定义内存指针访问及使访问非缓存等技巧。文章详细解释了 Nios II 处理器地址空间的划分,前 2GB 为缓存区域,后 2GB 为非缓存区域,并提供了具体的实现代码示例。

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